This invention relates to electrical power controllers for direct current electrical systems and more particularly to power controllers wherein the switching element is a field effect transistor (FET).
Electrical power controllers for use in direct current circuits which utilize PNP or NPN bipolar transistors as the power switch elements are well known. However, certain characteristics of bipolar power transistors such as relatively low gain, temperature instability, potential second breakdown, and low input impedance, have limited power controller efficiency and added to power controller complexity.
The recent commercial introduction of power field effect transistors has raised the possibility of improvement in power controller efficiency and performance. Power field effect transistors have relatively high gain, good temperature stability, high input impedance, and freedom from second breakdown. The present invention seeks to utilize these FET characteristics to provide a power controller which is more efficient and contains fewer parts than controllers which operate at similar power levels but use bipolar transistors as their primary switching element.
The power controller of this invention comprises a power field effect transistor (FET) which is used as a switch to control current into a load; gate drive circuitry which turns the FET on and off; current limiting circuitry which limits current into the load by forcing the gate drive circuitry to turn the FET off; and a bias voltage supply which raises the gate voltage signal to a level greater than the maximum load voltage. Provisions are also made for remote control of the power controller and for a visible and electrical indication of the on or off (trip) status of the FET.
Since commercially available power FET's are N channel devices, a positive voltage signal measured from gate to source is required to turn them on. When an FET is connected as a switch with its drain connected to a line voltage conductor and its source connected to a load, the voltage across the load will approach line voltage when the FET is turned on. This means that the voltage at the FET source will approach line voltage. Since gate voltage must be positive with respect to source voltage to maintain the on condition of the FET, gate voltage must be supplied from a voltage source which is greater than the maximum load voltage by a specified amount, typically five to twenty volts. A bias voltage source is included in the present invention to fulfill this requirement.
An integrated circuit logic gate is used to provide gate control voltage. This technique could not be used with a bipolar transistor as the switching element but can be used with an FET because of its high input impedance. Power control is provided by a current limiting circuit which senses load current and acts through the gate control circuit to turn the FET off when a preselected current level is exceeded.
The present invention controller utilizes a current limiting circuit and a logic gate driving circuit that are connected to a common bus which is not connected to load ground. This floating control circuit arrangement eliminates the level shifting and amplifying circuits previously required in power controllers which used bipolar transistors as the primary switching element.